PhD Radovan Sernec [16265]

1. ZAJC, Matej, SERNEC, Radovan, TASIČ, Jurij F. Fixed structure systolic array and processing of images. In: Proceedings. 9th Mediterranean Electrotechnical Conference, May 18-20, 1998, Tel-Aviv, Israel. New York: The Institute of Electrical and Electronics Engineers, cop. 1998. Vol. 1, str. 96-100, graf. prikazi. ISBN 0-7803-3879-0, ISBN 0-7803-3331-4. [COBISS.SI-ID 1211476]

2. SERNEC, Radovan, ZAJC, Matej, TASIČ, Jurij F. Multithreading in systolic/SIMD DSP processor arrays. In: Proceedings. 9th Mediterranean Electrotechnical Conference, May 18-20, 1998, Tel-Aviv, Israel. New York: The Institute of Electrical and Electronics Engineers, cop. 1998. Vol. 1, str. 663-667, graf. prikazi. ISBN 0-7803-3879-0, ISBN 0-7803-3331-4. [COBISS.SI-ID 1211220]

3. SERNEC, Radovan, ZAJC, Matej, TASIČ, Jurij F. Design trade-offs of a parallel DSP architecture: combining instruction and data level parallelism. In: KOVAČ, Mario (ed.). WDTA'98 : proceedings of the 1st International Workshop on Design, Test and Applications, Dubrovnik, Croatia, June 8-10, 1998. Zagreb: Faculty of Electrical Engineering and Computing, 1998. Str. 37-40, graf. prikazi. ISBN 953-184-009-1. [COBISS.SI-ID 1210452]

4. ZAJC, Matej, SERNEC, Radovan, TASIČ, Jurij F. Matrix multiplication based systolic array: Schur complement computation. In: KOVAČ, Mario (ed.). WDTA'98 : proceedings of the 1st International Workshop on Design, Test and Applications, Dubrovnik, Croatia, June 8-10, 1998. Zagreb: Faculty of Electrical Engineering and Computing, 1998. Str. 57-60, graf. prikazi. ISBN 953-184-009-1. [COBISS.SI-ID 1210196]

5. SERNEC, Radovan, ZAJC, Matej, TASIČ, Jurij F. Programmable systolic array control strategies: can VLIW offer the needed flexibility?. In: ZAJC, Baldomir (ed.). Zbornik sedme Elektrotehniške in računalniške konference ERK '98, 24. - 26. september 1998, Portorož, Slovenija. Ljubljana: IEEE Region 8, Slovenska sekcija IEEE, 1998. Zv. a, str. 233-236, graf. prikazi. ISBN 961-6062-14-X, ISBN 961-6062-15-8. [COBISS.SI-ID 1210964]

6. SERNEC, Radovan, ZAJC, Matej, TASIČ, Jurij F. Multithreaded systolic/SIMD DSP array processor - MUS2DAP. In: IBRAHIM, Mohammad K. (ed.), PIRSCH, Peter (ed.), MCCANNY, John (ed.). 1997 IEEE Workshop on Signal Processing Systems, SiPS 97 : design and implementation : [held on 3-5 November 1997, at the Holiday Inn, Leicester, UK]. Piscataway: IEEE, cop. 1997. Str. 448-457, graf. prikazi. ISBN 0-7803-3806-5, ISBN 0-7803-3807-3. [COBISS.SI-ID 669780]

7. TASIČ, Jurij F., SERNEC, Radovan, ZAJC, Matej. A systolic/SIMD processor architecture for XDSL applications. In: FAZEKAS, K... (ed.), ERENYI, I... (ed.), POLLET, T... (ed.). Proceedings CWAS ʹ97. International Workshop on Copper Wire Access Systems, 27-29 October 1997, Budapest, Hungary. Budapest: PANEM, 1997. Str. 293-299, graf. prikazi. ISBN 963-545-185-7. [COBISS.SI-ID 670292]

8. SERNEC, Radovan, ZAJC, Matej, TASIČ, Jurij F. Analysis of a class of systolic algorithms. In: ZAJC, Baldomir (ed.). Zbornik šeste Elektrotehniške in računalniške konference ERK '97, 25. - 27. september 1997, Portorož, Slovenija. Ljubljana: IEEE Region 8, Slovenska sekcija IEEE, 1997. Vol. a, str. 143-146. ISBN 961-6062-11-5, ISBN 961-6062-12-3. [COBISS.SI-ID 505940]

9. ZAJC, Matej, SERNEC, Radovan, TASIČ, Jurij F. Blokovna predstavitev vzporednih algoritmov in struktur. In: ZAJC, Baldomir (ed.). Zbornik šeste Elektrotehniške in računalniške konference ERK '97, 25. - 27. september 1997, Portorož, Slovenija. Ljubljana: IEEE Region 8, Slovenska sekcija IEEE, 1997. Vol. a, str. 147-150. ISBN 961-6062-11-5, ISBN 961-6062-12-3. [COBISS.SI-ID 505684]

10. SERNEC, Radovan, TASIČ, Jurij F. Silicon area usage of modern microprocessors. In: ZAJC, Baldomir (ed.), SOLINA, Franc (ed.). Zbornik pete Elektrotehniške in računalniške konference ERK '96, 19. - 21. september 1996, Portorož, Slovenija. Ljubljana: IEEE Region 8, Slovenska sekcija IEEE, 1996. Vol. a, str. 71-74. ISBN 961-6062-08-5, ISBN 961-6062-09-3. [COBISS.SI-ID 645204]